Product Details
Description
The MAX 7000 family of high-density, high-performance PLDs is based
on Altera’s second-generation MAX architecture. Fabricated with
advanced CMOS technology, the EEPROM-based MAX 7000 family provides
600 to 5,000 usable gates, ISP,pin-to-pin delays as fast as 5 ns,
and counter speeds of up to 175.4 MHz. MAX 7000S devices in the -5,
-6, -7, and -10 speed grades as well as MAX 7000 and MAX 7000E
devices in -5, -6, -7, -10P, and -12P speed grades comply with the
PCI Special Interest Group (PCI SIG) PCI Local Bus Specification,
Revision 2.2. See Table 3 for available speed grades.
Features
■ High-performance, EEPROM-based programmable logic devices (PLDs)
based on second-generation MAX®architecture
■ 5.0-V in-system programmability(ISP) through the built-in IEEE
Std. 1149.1 Joint Test Action Group (JTAG) interface available in
MAX 7000S devices
– ISP circuitry compatible with IEEE Std. 1532
■ Includes 5.0-V MAX 7000 devices and 5.0-V ISP-based MAX 7000S
devices
■ Built-in JTAG boundary-scan test (BST) circuitry in MAX7000S
devices with 128 or more macrocells
■ Complete EPLD family with logic densities ranging from 600 to
5,000 usable gates (see Tables 1and 2)
■ 5-ns pin-to-pin logic delays with up to 175.4-MHz counter
frequencies (including interconnect)
■ PCI-compliant devices available
Specifications
| Attribute | Attribute Value |
|---|
| Manufacturer | Intel / Altera |
| Product Category | CPLDs (Complex Programmable Logic Devices) |
| Series | MAX® 7000S |
| Product | MAX 7000 |
| Packaging | Tube |
| Unit-Weight | 0.239083 oz |
| Mounting-Style | SMD/SMT |
| Tradename | MAX 7000 |
| Package-Case | 84-LCC (J-Lead) |
| Operating-Temperature | 0°C ~ 70°C (TA) |
| Mounting-Type | Surface Mount |
| Supplier-Device-Package | 84-PLCC (29.31x29.31) |
| Memory-Type | EEPROM |
| Programmable-Type | In System Programmable |
| Delay-Time-tpd-1-Max | 7.5ns |
| Voltage-Supply-Internal | 4.75 V ~ 5.25 V |
| Number-of-Logic-Elements-Blocks | 10 |
| Number-of-Macrocells | 160 Macrocells |
| IC Number of Gates | 3200 |
| Number-of-I-O | 64 I/O |
| Maximum Operating Temperature | + 70 C |
| Operating temperature range | 0 C |
| Operating-Supply-Voltage | 5 V |
| Maximum-Operating-Frequency | 149.3 MHz |
| Supply-Voltage-Max | 5.25 V |
| Supply-Voltage-Min | 4.75 V |
| Package-Case | PLCC-84 |
| Propagation-Delay-Max | 6 ns |
| Input/output | 64 I/O |
| Number-of-Logic-Array-Blocks-LABs | 10 |
Form,Package,Functional compatible component
Descriptions
IC CPLD 160MC 7.5NS 84PLCC
CPLD MAX庐 7000S Family 3.2K Gates 160 Macro Cells 122MHz 5V 84-Pin
PLCC Tube
CPLD - Complex Programmable Logic Devices CPLD - MAX 7000 160 Macro
64 IOs
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